OK. With you so far.
What about where items are speced as having timings such as 4-4-4-12?
What does that mean?
Ok, we are now gettting beyond the 10,000m view so here goes
What you need to understand is how DRAM is accessed.
The best way to picture it is as a spreadsheet with rows and columns and each cell contains your stored data. Each row is a bank of memory
For the CPU to access memory, it first must determine which row or bank in the memory is to be accessed (which is DIMM in most domestic PC cases and described as banks) and then activate that row with the RAS signal. Once the start address of the data has been setup then it can access that row (or bank) sequentialy over and over until the data is exhausted without re-writing a new address value.
Sooo..
The values (in clock cycles) relate to a-b-c-d where
a= The CAS latency which is as above....i.e. its the time between the CAS signal being raised on the device and the data being requested being valid on the devices pins. - This is the only major figure to consider for normal use.
b= tRCD is the delay from the time a row is activated to when the cell (or column) can be activated by the CAS signal.
c- tRP is the time required to terminate one row access and begin the next row access.
d=tRAS - This is the time required before (or delay needed) between the active and precharge commands. In other words, how long the memory must wait before the next memory access can begin.
So, with the above.
CAS is key as it is a value that plays a part in EVERY memory read!
tRCP and tRP only come into play when changing between rows/banks which you would like to think is not very often but, sadly the operating systems are not that clever when it comes to memory mangement! You can however consider it considerably less significant than CAS
tRAS is only significant when moving to a different address within the same Row/Bank. Sadly again, memory management is not this clever in most operating systems!